1. Field of the Invention
The present invention relates to an error correction technology using cyclic codes. In particular, the present invention relates to an error correction method and an error correction circuit, which are used for correcting 2-event errors generated in reproduced data, as well as relates to an information-recording/reproduction apparatus employing the error correction circuit.
2. Description of Related Art
In order to detect an error generated in reproduced data, cyclic codes are used in a wide range of applications. A procedure for encoding data by using a cyclic code is shown in FIG. 2. A recording data sequence 21 is supplied to a division circuit 22 for dividing the recording data sequence 21 by a generating function, which is not shown in the figure. A remainder obtained as a result of the division is output from the division circuit 22 as a data sequence 23. The data sequence 23 is referred to as CRC (Cyclic Redundancy Check) data. The CRC data 23 is added to the tail of the recording data sequence 21 to produce an encoded recording data sequence 24. The encoded recording data sequence 24 is obviously divisible by the generating function. Thus, by checking the CRC data obtained as a result of a dividing the encoded recording data sequence 24 by using the division circuit 22 after operations to record and reproduce the encoded recording data sequence 24, it is possible to form a judgment as to whether or not an error has been generated in the reproduced encoded recording data sequence 24.
A conventional technology for correcting errors by using cyclic codes is described in Japanese Published Application No. 2000-57709 (Pages 3 to 4 and FIGS. 1 and 5). An example of applying this technology to signal processing carried out by a magnetic-disc apparatus is explained by referring to FIG. 7. A magnetic-disc apparatus (HDD) 1 comprises a head/disc assembly (HDA) 7 and a package board (PCB) 14. The HDA 7 includes a magnetic disc 2, a spindle motor 6, a magnetic head 3, a carriage 4 and a R/W-IC 5. The magnetic disc 2 is mounted on the spindle motor 6 for rotating the magnetic disc 2. The carriage 4 supports the magnetic head 3 and positions the magnetic head 3 at any arbitrary radial location of the magnetic disc 2. The R/W-IC 5 is attached to the carriage 4. The PCB 14 has read/write channels 8, a 1-event CRCC correction circuit 15, a hard disc controller (HDC) 9, a servo control circuit 10, a microprocessor (MPU) 11, a ROM 12 and a RAM 13.
The read/write channels 8 comprise a write channel for recording data and a read channel for reproducing data. A signal-processing technology adopted by the read channel is based on a PRML (Partial Response Maximum Likelihood) technique. It is known that a short error of the order of several bits is generated in a single event in data reproduced by adoption of the PRML technique. In accordance with the conventional technology disclosed in patent reference 1, (Japanese Published Application No. 2000-057709), the 1-event CRCC correction circuit 15 for generating cyclic codes is provided between the read/write channels 8 and the hard disc controller 9 so as to allow a 1-event error (that is, an error generated in a single event) to be corrected. A cyclic code that can be used for correcting an error is called a CRCC (Cyclic Redundancy Check Code) and a technique for correcting an error by using a CRCC is known as a CRCC correction technique. The 1-event CRCC correction circuit 15 carries out a CRCC encoding process and corrects a 1-event error.
On the other hand, Japanese Published Application No. 2000-134114 (Pages 6 to 9 and FIGS. 1, 4 and 5) discloses a technology for improving the power to correct an error by using a CRCC on the basis of reliability information obtained in a process of demodulating data reproduced by adoption of the PRML technique. In accordance with the technology, in the case of reproduced data with reliability lower than a threshold value, an extinction error is determined to have been generated. In this case, an extinction flag is set at the location of the extinction error and, by carrying out a CRCC correction process on a sequence obtained as a result of performing tentative-correction processing based on a flexible criterion for the reproduced data on the basis of the extinction flag, a 2-or-more-event error can be corrected.
The extinction flag based on the information on reliability is sensitive to the setting of the criterion threshold value. To be more specific, if the threshold value is set at an excessively large number, the extinction flags will be no longer set. If the threshold value is set at an excessively small number, on the other hand, a number of extinction flags will be set. Thus, it is practically difficult to obtain an accurate extinction flag for each bit unit in a stable manner. In addition, in implementing the CRCC correction technique, a correction processing circuit is required for each data sequence completing a tentative-correction process. Therefore, the circuit scale will inevitably increase.